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DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
14 years 2 months ago
Layout to Logic Defect Analysis for Hierarchical Test Generation
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A...
ACSAC
1999
IEEE
14 years 6 days ago
Non-repudiation Evidence Generation for CORBA using XML
This paper focuses on the provision of a nonrepudiation service for CORBA. The current OMG specification of a CORBA non-repudiation service forces the programmer to augment the ap...
Michael Wichert, David B. Ingham, Steve J. Caughey
BALT
2010
13 years 2 months ago
Grammatical Aspects: Coping with Duplication and Tangling in Language Specifications
For the purposes of tool development, computer languages are usually described using context-free grammars with annotations such as semantic actions or pretty-printing instructions...
Andrey Breslav
ICWS
2010
IEEE
13 years 9 months ago
A Pattern-Driven Generation of Security Policies for Service-Oriented Architectures
Service-oriented Architectures support the provision, discovery, and usage of services in different application contexts. The Web Service specifications provide a technical founda...
Michael Menzel, Robert Warschofsky, Christoph Mein...
WOSP
2010
ACM
14 years 2 months ago
Agile resource management in a virtualized data center
In this paper we develop, implement and evaluate an approach to quickly reassign resources for a virtualized utility computing platform. The approach provides this platform agilit...
Wei Zhang, Hangwei Qian, Craig E. Wills, Michael R...