Sciweavers

441 search results - page 18 / 89
» Generic Timing Fault Tolerance using a Timely Computing Base
Sort
View
DATE
2004
IEEE
121views Hardware» more  DATE 2004»
14 years 21 days ago
Experiences during the Experimental Validation of the Time-Triggered Architecture
During last years, the Time-Triggered Architecture (TTA) has been gaining acceptance as a generic architecture for highly dependable real-time systems. It is now being used to imp...
Sara Blanc, Joaquin Gracia, Pedro J. Gil
ADAEUROPE
2005
Springer
14 years 2 months ago
Non-intrusive System Level Fault-Tolerance
This paper describes the methodology used to add nonintrusive system-level fault tolerance to an electronic throttle controller. The original model of the throttle controller is a...
Kristina Lundqvist, Jayakanth Srinivasan, Sé...
FPL
2006
Springer
99views Hardware» more  FPL 2006»
14 years 19 days ago
Reconfiguration and Fine-Grained Redundancy for Fault Tolerance in FPGAs
As manufacturing technology enters the ultra-deep submicron era, wafer yields are destined to drop due to higher occurrence of physical defects on the die. This paper proposes a y...
Nicola Campregher, Peter Y. K. Cheung, George A. C...
ICPP
2007
IEEE
14 years 3 months ago
Improving Search Using a Fault-Tolerant Overlay in Unstructured P2P Systems
Gnutella overlays have evolved to use a two-tier topology. However, we observed that the new topology had only achieved modest improvements in search success rates. Also, the new ...
William Acosta, Surendar Chandra
DSN
2007
IEEE
14 years 27 days ago
Determining Fault Tolerance of XOR-Based Erasure Codes Efficiently
We propose a new fault tolerance metric for XOR-based erasure codes: the minimal erasures list (MEL). A minimal erasure is a set of erasures that leads to irrecoverable data loss ...
Jay J. Wylie, Ram Swaminathan