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ISPD
2004
ACM
134views Hardware» more  ISPD 2004»
14 years 2 months ago
Performance-driven register insertion in placement
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
Dennis K. Y. Tong, Evangeline F. Y. Young
CC
1998
Springer
111views System Software» more  CC 1998»
13 years 8 months ago
Live Range Splitting in a Graph Coloring Register Allocator
Graph coloring is the dominant paradigm for global register allocation [8, 7, 4]. Coloring allocators use an interference graph, Z, to model conflicts that prevent two values from ...
Keith D. Cooper, L. Taylor Simpson
VLSISP
2008
159views more  VLSISP 2008»
13 years 8 months ago
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores
The compiler is generally regarded as the most important software component that supports a processor design to achieve success. This paper describes our application of the open re...
Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin...
DATE
2009
IEEE
105views Hardware» more  DATE 2009»
14 years 3 months ago
Exploiting narrow-width values for thermal-aware register file designs
—Localized heating-up creates thermal hotspots across the chip, with the integer register file ranked as the hottest unit in high-performance microprocessors. In this paper, we ...
Shuai Wang, Jie Hu, Sotirios G. Ziavras, Sung Woo ...