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DATE
2010
IEEE
141views Hardware» more  DATE 2010»
14 years 1 months ago
Loosely Time-Triggered Architectures for Cyber-Physical Systems
Abstract—Cyber-Physical Systems require distributed architectures to support safety critical real-time control. Kopetz’ Time-Triggered Architectures (TTA) have been proposed as...
Albert Benveniste
ICCD
1997
IEEE
90views Hardware» more  ICCD 1997»
14 years 5 days ago
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model
Asynchronous design has a potential of solving many difficulties, such as clock skew and power consumption, which synchronous counterpart suffers with current and future VLSI tech...
Akihiro Takamura, Masashi Kuwako, Masashi Imai, Ta...
ENTCS
2006
168views more  ENTCS 2006»
13 years 8 months ago
A Functional Programming Framework for Latency Insensitive Protocol Validation
Latency insensitive protocols (LIPs) have been proposed as a viable means to connect synchronous IP blocks via long interconnects in a system-on-chip. The reason why one needs to ...
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla...
ICONS
2009
IEEE
14 years 3 months ago
Power Saving of Real Time Embedded Sensor for Medical Remote Monitoring
The power saving is one of the important issue in the embedded systems. To reduce the consumption of the microprocessor of such a system, a way is to power down it when it is inac...
Frederic Fauberteau, Serge Midonnet, Dan Istrate
EMSOFT
2007
Springer
14 years 2 months ago
Loosely time-triggered architectures based on communication-by-sampling
We address the problem of mapping a set of processes which communicate synchronously on a distributed platform. The Time Triggered Architecture (TTA) proposed by Kopetz for the co...
Albert Benveniste, Paul Caspi, Marco Di Natale, Cl...