227 search results - page 16 / 46 » Graph Rewriting for Hardware Dependent Program Optimizations |
MICRO
2000
IEEE
13 years 12 months ago
2000
IEEE
Value prediction breaks data dependencies in a program thereby creating instruction level parallelism that can increase program performance. Hardware based value prediction techni...
SC
1990
ACM
13 years 11 months ago
1990
ACM
Loop distribution is an integral part of transforming a sequential program into a parallel one. It is used extensively in parallelization,vectorization, and memory management. For...
ICS
1989
Tsinghua U.
13 years 11 months ago
1989
Tsinghua U.
Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instru...
ITC
1999
IEEE
13 years 11 months ago
1999
IEEE
A high-level built-in self-test (BIST) synthesis involves several tasks such as system register assignment, interconnection assignment, and BIST register assignment. Existing high...
FPGA
2010
ACM
14 years 4 months ago
2010
ACM
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...