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CICC
2011
106views more  CICC 2011»
12 years 8 months ago
A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons
Efforts to achieve the long-standing dream of realizing scalable learning algorithms for networks of spiking neurons in silicon have been hampered by (a) the limited scalability of...
Jae-sun Seo, Bernard Brezzo, Yong Liu, Benjamin D....
TCOM
2008
92views more  TCOM 2008»
13 years 8 months ago
Mailbox switch: a scalable two-stage switch architecture for conflict resolution of ordered packets
Abstract-- Traditionally, conflict resolution in an inputbuffered switch is solved by finding a matching between inputs and outputs per time slot. To do this, a switch not only nee...
Cheng-Shang Chang, Duan-Shin Lee, Ying-Ju Shih, Ch...
ICNS
2006
IEEE
14 years 2 months ago
CORNet: A Scalable and Bandwidth-Efficient Optical Burst Switching Ring Architecture for Metro Area Networks
The rapid evolution of networks has been driven by new advances in enabling technologies and the explosive growth of Internet traffic. Optical Burst Switching (OBS) is not only co...
Hui-Tang Lin, Wang-Rong Chang
DATE
1997
IEEE
86views Hardware» more  DATE 1997»
14 years 25 days ago
Highly scalable parallel parametrizable architecture of the motion estimator
In this paper a parametrizable architecture of a motion estimator (ME) is presented. The ME is designed as a generic full pixel calculation module which can be adopted for di eren...
Radim Cmar, Serge Vernalde
SLIP
2009
ACM
14 years 3 months ago
Honeycomb-structured computational interconnects and their scalable extension to spherical domains
The present paper is part of a larger effort to redesign, from the ground up, the best possible interconnect topologies for switchless multiprocessor computer systems. We focus he...
Joseph B. Cessna, Thomas R. Bewley