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ASPLOS
2004
ACM
14 years 2 months ago
Scalable selective re-execution for EDGE architectures
Pipeline flushes are becoming increasingly expensive in modern microprocessors with large instruction windows and deep pipelines. Selective re-execution is a technique that can r...
Rajagopalan Desikan, Simha Sethumadhavan, Doug Bur...
WMPI
2004
ACM
14 years 2 months ago
Scalable cache memory design for large-scale SMT architectures
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...
Muhamed F. Mudawar
DAC
2001
ACM
14 years 9 months ago
Scalable Hybrid Verification of Complex Microprocessors
Maher N. Mneimneh, Fadi A. Aloul, Christopher T. W...
CLUSTER
2002
IEEE
14 years 1 months ago
Scalable Resource Management in High Performance Computers
Clusters of workstations have emerged as an important platform for building cost-effective, scalable, and highlyavailable computers. Although many hardware solutions are available...
Eitan Frachtenberg, Fabrizio Petrini, Juan Fern&aa...
CASES
2008
ACM
13 years 10 months ago
Efficiency and scalability of barrier synchronization on NoC based many-core architectures
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
Oreste Villa, Gianluca Palermo, Cristina Silvano