550 search results - page 25 / 110 » Hardware Accelerated Power Estimation |
120
Voted
TR
2010
14 years 9 months ago
2010
Previous work on planning accelerated life tests has been based on large-sample approximations to evaluate test plan properties. In this paper, we use more accurate simulation met...
125
Voted
ASAP
2008
IEEE
15 years 9 months ago
2008
IEEE
RNA structure prediction, or folding, is a computeintensive task that lies at the core of several search applications in bioinformatics. We begin to address the need for high-thro...
107
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ISLPED
1995
ACM
15 years 6 months ago
1995
ACM
We present a transistor level power estimator which exploits algorithms for fast circuit simulation to compute the power dissipation of CMOS circuits. The proposed approach uses s...
147
Voted
ISLPED
1997
ACM
15 years 6 months ago
1997
ACM
New measures of peak power in the context of sequential circuits are proposed. This paper presents an automatic procedure to obtain very good lower bounds on these measures as wel...
126
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ISSS
2002
IEEE
15 years 7 months ago
2002
IEEE
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...