112 search results - page 16 / 23 » Hardware Acceleration of Matrix Multiplication on a Xilinx F... |
ICC
2011
IEEE
12 years 7 months ago
2011
IEEE
—Regular expression matching has become a critical yet challenging technique in content-aware network processing, such as application identification and deep inspection. To meet ...
HIPEAC
2010
Springer
13 years 11 months ago
2010
Springer
Abstract. Publish-subscribe systems present the state of the art in information dissemination to multiple users. Such systems have evolved from simple topic-based to the current XM...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper, a real output queuing switch prototype implementation is presented. This implementation is based on a novel high speed multidrop backplane and a general purpose lin...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
We describe a flexible hardware encoder for regular and irregular low-density parity-check (LDPC) codes. Although LDPC codes achieve achieve better performance and lower decoding ...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
The use of pipelined floating-point arithmetic cores to create high-performance FPGA-based computational kernels has introduced a new class of problems that do not exist when usi...