112 search results - page 17 / 23 » Hardware Acceleration of Matrix Multiplication on a Xilinx F... |
FPL
2005
Springer
14 years 1 months ago
2005
Springer
This paper describes novel data-path architecture for FPGA-based multimedia processors. The proposed circuit can adapt itself at run-time to different operations and data wordleng...
PARELEC
2000
IEEE
13 years 12 months ago
2000
IEEE
The purpose of this paper is to demonstrate the implementation of an adaptable parallel architecture capable of system to task adaptation. The system implementation was based on X...
FPL
2005
Springer
14 years 1 months ago
2005
Springer
A module generator called Mullet for producing near-optimal parallel multipliers in a technology independent manner is presented. Using this tool, a large number of candidate desi...
VLSISP
2011
13 years 2 months ago
2011
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
FPGA
2010
ACM
14 years 18 days ago
2010
ACM
This paper describes a heterogeneous computer cluster called Axel. Axel contains a collection of nodes; each node can include multiple types of accelerators such as FPGAs (Field P...