Sciweavers

117 search results - page 6 / 24
» Hardware Compilation for FPGA-Based Configurable Computing M...
Sort
View
ASM
2008
ASM
13 years 10 months ago
Using EventB to Create a Virtual Machine Instruction Set Architecture
A Virtual Machine (VM) is a program running on a conventional microprocessor that emulates the binary instruction set, registers, and memory space of an idealized computing machine...
Stephen Wright
MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
13 years 6 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...
PPOPP
2009
ACM
14 years 9 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle
PDP
2010
IEEE
13 years 7 months ago
FTDS: Adjusting Virtual Computing Resources in Threshing Cases
—In the virtual execution environment, dynamic computing resource adjustment technique, configuring the computing resource of virtual machines automatically according to the actu...
Jian Huang, Hai Jin, Kan Hu, Zhiyuan Shao
IPPS
2003
IEEE
14 years 1 months ago
Loop Dissevering: A Technique for Temporally Partitioning Loops in Dynamically Reconfigurable Computing Platforms
This paper presents a technique, called loop dissevering, to temporally partitioning any type of loop presented in programming languages. The technique can be used in the presence...
João M. P. Cardoso