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» Hardware Evaluation of the AES Finalists
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DATE
2004
IEEE
110views Hardware» more  DATE 2004»
14 years 1 months ago
Interactive Cosimulation with Partial Evaluation
We present a technique to improve the efficiency of hardware-software cosimulation, using design information known at simulator compile-time. The generic term for such optimizatio...
Patrick Schaumont, Ingrid Verbauwhede
CTRSA
2005
Springer
108views Cryptology» more  CTRSA 2005»
14 years 3 months ago
A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box
This work proposes a compact implementation of the AES S-box using composite field arithmetic in GF(((22 ) 2 ) 2 ). It describes a systematic exploration of different choices for...
Nele Mentens, Lejla Batina, Bart Preneel, Ingrid V...
FPGA
2000
ACM
175views FPGA» more  FPGA 2000»
14 years 1 months ago
An FPGA implementation and performance evaluation of the Serpent block cipher
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
Adam J. Elbirt, Christof Paar
CHES
2010
Springer
187views Cryptology» more  CHES 2010»
13 years 11 months ago
Garbled Circuits for Leakage-Resilience: Hardware Implementation and Evaluation of One-Time Programs - (Full Version)
The power of side-channel leakage attacks on cryptographic implementations is evident. Today's practical defenses are typically attack-specific countermeasures against certain...
Kimmo Järvinen, Vladimir Kolesnikov, Ahmad-Re...
ICAC
2007
IEEE
14 years 4 months ago
A Tiny and Light-Weight Autonomic Element for Wireless Sensor Networks
Autonomic networks are able to monitor and control themselves without direct human intervention. The smallest unit of an autonomic network is the autonomic element (AE). This work...
Thais Regina M. Braga, Fabrício A. Silva, J...