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» Hardware Implementations of Artificial Neural Networks
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ISCAS
2005
IEEE
117views Hardware» more  ISCAS 2005»
14 years 1 months ago
A VLSI model of the bat dorsal nucleus of the lateral lemniscus for azimuthal echolocation
— The dorsal nucleus of the lateral lemniscus (DNLL) is a distinct group of auditory cells that play a strategic role in azimuthal echolocation in the bat. Dominated by EI-type c...
Rock Z. Shi, Timothy K. Horiuchi
EH
2002
IEEE
97views Hardware» more  EH 2002»
14 years 18 days ago
Coevolution of Form and Function in the Design of Micro Air Vehicles
This paper discusses approaches to cooperative coevolution of form and function for autonomous vehicles, specifically evolving morphology and control for an autonomous micro air v...
Magdalena D. Bugajska, Alan C. Schultz
NIPS
1998
13 years 9 months ago
A High Performance k-NN Classifier Using a Binary Correlation Matrix Memory
This paper presents a novel and fast k-NN classifier that is based on a binary CMM (Correlation Matrix Memory) neural network. A robust encoding method is developed to meet CMM in...
Ping Zhou, Jim Austin, John Kennedy
ISCAS
2006
IEEE
144views Hardware» more  ISCAS 2006»
14 years 1 months ago
A VLSI spike-driven dynamic synapse which learns only when necessary
— We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is hi...
S. Mitra, Stefano Fusi, Giacomo Indiveri
ESANN
2000
13 years 9 months ago
Load forecasting dealing with medium voltage network reconfiguration
Planing the operation in modern power systems requires suitable anticipation of load evolution at different levels of distribution network. Under this perspective, load forecasting...
José Nuno Fidalgo, João Abel Pe&cced...