45 search results - page 6 / 9 » Hardware Performance Simulations of Round 2 Advanced Encrypt... |
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
We propose a novel methodology to generate Application Specific Instruction Processors (ASIPs) including custom instructions. Our implementation balances performance and area req...
ISPASS
2005
IEEE
14 years 1 months ago
2005
IEEE
A wide spectrum of e-commerce (B2B/B2C), banking, financial trading and other business applications require the exchange of data to be highly secure. The Secure Sockets Layer (SSL...
GLVLSI
2003
IEEE
14 years 22 days ago
2003
IEEE
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach nearopti...