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» Hardware Reuse at the Behavioral Level
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ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Cycle error correction in asynchronous clock modeling for cycle-based simulation
— As the complexity of SoCs is increasing, hardware/software co-verification becomes an important part of system verification. C-level cycle-based simulation could be an efficien...
Junghee Lee, Joonhwan Yi
AHS
2006
IEEE
124views Hardware» more  AHS 2006»
14 years 2 months ago
A Generic On-Chip Debugger for Wireless Sensor Networks
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
ICCAD
1996
IEEE
133views Hardware» more  ICCAD 1996»
14 years 19 days ago
Basic concepts for an HDL reverse engineering tool-set
Designer's productivity has become the key-factor of the development of electronic systems. An increasing application of design data reuse is widely recognized as a promising...
Gunther Lehmann, Bernhard Wunder, Klaus D. Mü...
ACSD
2003
IEEE
87views Hardware» more  ACSD 2003»
14 years 1 months ago
Separation of Concerns in the Formal Design of Real-Time Shared Data-Space Systems
This paper proposes a formal framework for the design of real-time shared data-space systems. The proposed method separates the concerns of functionality, behavior, and timing. Th...
Mohammad Reza Mousavi, Michel A. Reniers, Twan Bas...
ECMDAFA
2009
Springer
115views Hardware» more  ECMDAFA 2009»
14 years 3 months ago
Managing Flexibility: Modeling Binding-Times in Simulink
Abstract. Model-based development is supposed to improve the development efficiency by raising the abstraction level and generating applications instead of manually coding the appl...
Danilo Beuche, Jens Weiland