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» Hardware Software Co-Design Using Functional Languages
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DATE
2007
IEEE
102views Hardware» more  DATE 2007»
14 years 4 months ago
Efficient testbench code synthesis for a hardware emulator system
: - The rising complexity of modern embedded systems is causing a significant increase in the verification effort required by hardware designers and software developers, leading to...
Ioannis Mavroidis, Ioannis Papaefstathiou
ASPLOS
2008
ACM
14 years 11 days ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
DAC
1997
ACM
14 years 2 months ago
Generation of Software Tools from Processor Descriptions for Hardware/Software Codesign
An experimental set of tools that generate instruction set simulators, assemblers, and disassemblers from a single description was developed to test if retargetable development to...
Mark R. Hartoog, James A. Rowson, Prakash D. Reddy...
TC
2010
13 years 5 months ago
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
Holger Lange, Andreas Koch
JSA
2007
142views more  JSA 2007»
13 years 10 months ago
Efficient FPGA hardware development: A multi-language approach
This paper presents a multi-language framework to FPGA hardware development which aims to satisfy the dual requirement of high level hardware design and efficient hardware impleme...
Khaled Benkrid, Abdsamad Benkrid, S. Belkacemi