Automatic vectorization of programs for partitioned-ALU SIMD (Single Instruction Multiple Data) processors has been difficult because of not only data dependency issues but also n...
We propose an execution model that orchestrates the fine-grained interaction of a conventional general-purpose processor (GPP) and a high-speed reconfigurable hardware accelerator ...
We introduce a new execution model for orchestrating the interaction between the conventional processor and the reconfigurable compute unit in adaptive computer systems. We then ...
Multiprocessor operating systems (OSs) pose several unique and conflicting challenges to System Virtual Machines (System VMs). For example, most existing system VMs resort to gan...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
We specify a hardware architecture that supports tamper-resistant software by identifying an “idealized” hich gives the abstracted actions available to a single user program. ...
David Lie, John C. Mitchell, Chandramohan A. Thekk...