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» Hardware Support for Fast Capability-based Addressing
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HPCA
2011
IEEE
13 years 1 months ago
HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained paralle...
Sanghoon Lee, Devesh Tiwari, Yan Solihin, James Tu...
MICRO
1995
IEEE
102views Hardware» more  MICRO 1995»
14 years 1 months ago
Zero-cycle loads: microarchitecture support for reducing load latency
Untolerated load instruction latencies often have a significant impact on overall program performance. As one means of mitigating this effect, we present an aggressive hardware-b...
Todd M. Austin, Gurindar S. Sohi
CLUSTER
2010
IEEE
13 years 1 months ago
Middleware support for many-task computing
Many-task computing aims to bridge the gap between two computing paradigms, high throughput computing and high performance computing. Many-task computing denotes highperformance co...
Ioan Raicu, Ian T. Foster, Mike Wilde, Zhao Zhang,...
ICS
1999
Tsinghua U.
14 years 2 months ago
Fast cluster failover using virtual memory-mapped communication
This paper proposes a novel way to use virtual memorymapped communication (VMMC) to reduce the failover time on clusters. With the VMMC model, applications’ virtual address spac...
Yuanyuan Zhou, Peter M. Chen, Kai Li
ISPD
2006
ACM
90views Hardware» more  ISPD 2006»
14 years 3 months ago
Fast buffer insertion considering process variations
Advanced process technologies call for a proactive consideration of process variations in design to ensure high parametric timing yield. Despite of its popular use in almost any h...
Jinjun Xiong, Lei He