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141
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RSP
2006
IEEE
102views Control Systems» more  RSP 2006»
15 years 9 months ago
Rapid Resource-Constrained Hardware Performance Estimation
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrish...
EH
2004
IEEE
125views Hardware» more  EH 2004»
15 years 7 months ago
Routine High-Return Human-Competitive Evolvable Hardware
This paper reviews the use of genetic programming as an automated invention machine for the synthesis of both the topology and sizing of analog electrical circuits. The paper focu...
John R. Koza, Martin A. Keane, Matthew J. Streeter
145
Voted
IPPS
2007
IEEE
15 years 10 months ago
C++ based System Synthesis of Real-Time Video Processing Systems targeting FPGA Implementation
Implementing real-time video processing systems put high requirements on computation and memory performance. FPGAs have proven to be effective implementation architecture for thes...
Najeem Lawal, Mattias O'Nils, Benny Thörnberg
143
Voted
CORR
2006
Springer
112views Education» more  CORR 2006»
15 years 3 months ago
High-level synthesis under I/O Timing and Memory constraints
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
Philippe Coussy, Gwenolé Corre, Pierre Bome...
CAV
2007
Springer
113views Hardware» more  CAV 2007»
15 years 10 months ago
On Synthesizing Controllers from Bounded-Response Properties
In this paper we propose a complete chain for synthesizing controllers from high-level specifications. From real-time properties expressed in the logic MTL we generate, under boun...
Oded Maler, Dejan Nickovic, Amir Pnueli