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» Hardware Synthesis from C C Models
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ASYNC
1998
IEEE
110views Hardware» more  ASYNC 1998»
15 years 8 months ago
Analyzing Specifications for Delay-Insensitive Circuits
We present the XDI Model for specifying delay-insensitive circuits, that is, reactive systems that correctly exchange signals with their environment in spite of unknown delays inc...
Tom Verhoeff
130
Voted
ACSD
2005
IEEE
144views Hardware» more  ACSD 2005»
15 years 9 months ago
An Automated Fine-Grain Pipelining Using Domino Style Asynchronous Library
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
Alexander B. Smirnov, Alexander Taubin, Ming Su, M...
COLT
2006
Springer
15 years 7 months ago
Efficient Learning Algorithms Yield Circuit Lower Bounds
We describe a new approach for understanding the difficulty of designing efficient learning algorithms. We prove that the existence of an efficient learning algorithm for a circui...
Lance Fortnow, Adam R. Klivans
ATAL
2009
Springer
15 years 10 months ago
agentTool III: from process definition to code generation
The agentTool III (aT3 ) development environment is built on the Eclipse platform and provides traditional model creation tools to support the analysis, design, and implementation...
Juan C. García-Ojeda, Scott A. DeLoach, Rob...
NIPS
2001
15 years 5 months ago
Generalizable Relational Binding from Coarse-coded Distributed Representations
We present a model of binding of relationship information in a spatial domain (e.g., square above triangle) that uses low-order coarse-coded conjunctive representations instead of...
Randall C. O'Reilly, R. S. Busby