3902 search results - page 46 / 781 » Hardware Synthesis from C C Models |
MEMOCODE
2010
IEEE
13 years 7 months ago
2010
IEEE
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
CODES
2009
IEEE
14 years 3 months ago
2009
IEEE
Multiprocessor System-on-Chips (MPSoCs) are nowadays widely used, but the problem of their software development persists to be one of the biggest challenges for developers. Virtua...
ASPDAC
2006
ACM
14 years 3 months ago
2006
ACM
– In shared SoC bus systems, arbiters are usually adopted to solve bus contentions with various kinds of arbitration algorithms. We propose an arbitration algorithm, RT_lottery, ...
WORDS
2005
IEEE
14 years 2 months ago
2005
IEEE
Reliable program Worst-Case Execution Time (WCET) estimates are a key component when designing and verifying real-time systems. One way to derive such estimates is by static WCET ...
ISSS
2000
IEEE
14 years 1 months ago
2000
IEEE
Even though high-level hardware synthesis from dataflow graphs becomes popular in designing DSP systems, currently used dataflow models are inefficient to deal with emerging multi...