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» Hardware Synthesis from Term Rewriting Systems
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ENTCS
2007
168views more  ENTCS 2007»
13 years 8 months ago
Bytecode Rewriting in Tom
In this paper, we present a term rewriting based library for manipulating Java bytecode. We define a mapping from bytecode programs to algebraic terms, and we use Tom, an extensi...
Emilie Balland, Pierre-Etienne Moreau, Antoine Rei...
GLVLSI
2006
IEEE
126views VLSI» more  GLVLSI 2006»
14 years 2 months ago
Hardware/software partitioning of operating systems: a behavioral synthesis approach
In this paper we propose a hardware real time operating system (HW-RTOS) solution that makes use of a dedicated hardware in order to replace the standard support provided by the P...
Sathish Chandra, Francesco Regazzoni, Marcello Laj...
ESORICS
2006
Springer
14 years 15 days ago
Policy-Driven Memory Protection for Reconfigurable Hardware
Abstract. While processor based systems often enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reconfigurable har...
Ted Huffmire, Shreyas Prasad, Timothy Sherwood, Ry...
FPGA
1999
ACM
130views FPGA» more  FPGA 1999»
14 years 1 months ago
Hybrid Product Term and LUT Based Architectures Using Embedded Memory Blocks
The Embedded System Block (ESB) of the APEX20K programmable logic device family from Altera Corporation includes the capability of implementing product term macrocells in addition...
Frank Heile, Andrew Leaver
MST
2006
129views more  MST 2006»
13 years 8 months ago
Reachability Problems on Regular Ground Tree Rewriting Graphs
We consider the transition graphs of regular ground tree (or term) rewriting systems. The vertex set of such a graph is a (possibly infinite) set of trees. Thus, with a finite tree...
Christof Löding