Sciweavers

974 search results - page 58 / 195
» Hardware Synthesis from Term Rewriting Systems
Sort
View
ISQED
2011
IEEE
230views Hardware» more  ISQED 2011»
13 years 18 days ago
Constraint generation for software-based post-silicon bug masking with scalable resynthesis technique for constraint optimizatio
Due to the dramatic increase in design complexity, verifying the functional correctness of a circuit is becoming more difficult. Therefore, bugs may escape all verification effo...
Chia-Wei Chang, Hong-Zu Chou, Kai-Hui Chang, Jie-H...
ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
14 years 3 months ago
Performance pathologies in hardware transactional memory
Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously propos...
Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Y...
BIRTHDAY
2005
Springer
14 years 2 months ago
Expander2
Expander2 is a flexible multi-purpose workbench for interactive rewriting, verification, constraint solving, flow graph analysis and other procedures that build up proofs or co...
Peter Padawitz
FPL
2009
Springer
179views Hardware» more  FPL 2009»
14 years 23 days ago
Building heterogeneous reconfigurable systems using threads
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a software-like...
Jason Agron, David L. Andrews
WWW
2008
ACM
14 years 9 months ago
Forcehttps: protecting high-security web sites from network attacks
As wireless networks proliferate, web browsers operate in an increasingly hostile network environment. The HTTPS protocol has the potential to protect web users from network attac...
Collin Jackson, Adam Barth