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» Hardware Task Scheduling for Partially Reconfigurable FPGAs
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FPL
2005
Springer
139views Hardware» more  FPL 2005»
14 years 3 months ago
Mullet - A Parallel Multiplier Generator
A module generator called Mullet for producing near-optimal parallel multipliers in a technology independent manner is presented. Using this tool, a large number of candidate desi...
Kuen Hung Tsoi, Philip Heng Wai Leong
ACSD
2006
IEEE
90views Hardware» more  ACSD 2006»
14 years 1 months ago
Simulation and Verification of Asynchronous Systems by means of a Synchronous Model
Synchrony and asynchrony are commonly opposed to each other. Now, in embedded applications, actual solutions are often situated in between, with synchronous processes composed in ...
Nicolas Halbwachs, Louis Mandel
IPPS
2006
IEEE
14 years 3 months ago
An adaptive system-on-chip for network applications
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...
TC
2008
13 years 9 months ago
Cryptanalysis with COPACOBANA
Cryptanalysis of ciphers usually involves massive computations. The security parameters of cryptographic algorithms are commonly chosen so that attacks are infeasible with availabl...
Tim Güneysu, Timo Kasper, Martin Novotn&yacut...
EUROCAST
2007
Springer
102views Hardware» more  EUROCAST 2007»
14 years 4 months ago
Trajectory Planning in a Crossroads for a Fleet of Driverless Vehicles
In the context of Intelligent Transportation Systems based on driverless vehicles, one important issue is the passing of a crossroads. This paper presents a supervised reservation ...
Olivier Mehani, Arnaud de La Fortelle