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» Hardware design experiences in ZebraNet
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SIGMETRICS
1998
ACM
13 years 12 months ago
Predicting MPEG Execution Times
This paper reports on a set of experiments that measure the amount of CPU processing needed to decode MPEGcompressed video in software. These experiments were designed to discover...
Andy C. Bavier, Allen Brady Montz, Larry L. Peters...
ETS
2007
IEEE
76views Hardware» more  ETS 2007»
13 years 7 months ago
Lifelong Learning Organisers: Requirements for Tools for Supporting Episodic and Semantic Learning
We propose Lifelong Learning Organisers (LLOs) as tools to support the capturing, organisation and retrieval of personal learning experiences, resources and notes, over a range of...
Giasemi N. Vavoula, Mike Sharples
ASAP
2007
IEEE
150views Hardware» more  ASAP 2007»
13 years 11 months ago
Customizing Reconfigurable On-Chip Crossbar Scheduler
We present a design of a customized crossbar scheduler for on-chip networks. The proposed scheduler arbitrates on-demand interconnects, where physical topologies are identical to ...
Jae Young Hur, Todor Stefanov, Stephan Wong, Stama...
CF
2004
ACM
13 years 11 months ago
Platform-independent methodology for partial reconfiguration
In this paper we present a novel methodology for partial (re-)configuration that can be used for most bitstream configured hardware (HW). In particular low priced and not for part...
Dirk Koch, Jürgen Teich
CN
2002
91views more  CN 2002»
13 years 7 months ago
VERA: an extensible router architecture
We recognize two trends in router design: increasing pressure to extend the set of services provided by the router and increasing diversity in the hardware components used to cons...
Scott Karlin, Larry L. Peterson