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» Hardware design experiences in ZebraNet
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ASPDAC
2005
ACM
90views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Register placement for low power clock network
In modern VLSI designs, the increasingly severe power problem requests to minimize clock routing wirelength so that both power consumption and power supply noise can be alleviated...
Yongqiang Lu, Cliff C. N. Sze, Xianlong Hong, Qian...
ASPDAC
2005
ACM
107views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Substrate resistance extraction with direct boundary element method
- It is important to model the substrate coupling for mixed-signal circuit designs today. This paper presents the direct boundary element method (BEM) for substrate resistance calc...
Xiren Wang, Wenjian Yu, Zeyi Wang
IJPP
2008
148views more  IJPP 2008»
13 years 7 months ago
Analysis and Optimisation of Hierarchically Scheduled Multiprocessor Embedded Systems
We present an approach to the analysis and optimisation of heterogeneous multiprocessor embedded systems. The systems are heterogeneous not only in terms of hardware components, b...
Traian Pop, Paul Pop, Petru Eles, Zebo Peng
MICRO
2000
IEEE
95views Hardware» more  MICRO 2000»
13 years 7 months ago
Predicting the Future
We present a novel methodology for predicting future outcomes that uses small numbers of individuals participating in an imperfect information market. By determining their risk att...
LREC
2010
256views Education» more  LREC 2010»
13 years 9 months ago
WAPUSK20 - A Database for Robust Audiovisual Speech Recognition
Audiovisual speech recognition (AVSR) systems have been proven superior over audio-only speech recognizers in noisy environments by incorporating features of the visual modality. ...
Alexander Vorwerk, Xiaohui Wang, Dorothea Kolossa,...