57 search results - page 6 / 12 » Hardware for Speculative Run-Time Parallelization in Distrib... |
ICS
1999
Tsinghua U.
13 years 12 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
IPPS
2000
IEEE
13 years 12 months ago
2000
IEEE
In order to reduce the overhead of synchronizing operations of shared memory multiprocessors, this paper proposes a mechanism, named specMEM, to execute memory accesses following ...
ICS
1993
Tsinghua U.
13 years 11 months ago
1993
Tsinghua U.
Shared-memory provides a uniform and attractive mechanism for communication. For efficiency, it is often implemented with a layer of interpretive hardware on top of a message-pas...
HPCA
1998
IEEE
13 years 12 months ago
1998
IEEE
As we look to the future, and the prospect of a billion transistors on a chip, it seems inevitable that microprocessors will exploit having multiple parallel threads. To achieve t...
ICS
2001
Tsinghua U.
14 years 1 days ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...