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» Hardware implementation of a novel genetic algorithm
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CAV
2010
Springer
198views Hardware» more  CAV 2010»
15 years 7 months ago
Automatically Proving Linearizability
Abstract. This paper presents a practical automatic verification procedure for proving linearizability (i.e., atomicity and functional correctness) of concurrent data structure im...
Viktor Vafeiadis
FPGA
2004
ACM
174views FPGA» more  FPGA 2004»
15 years 8 months ago
A compiled accelerator for biological cell signaling simulations
The simulation of large systems of biochemical reactions is a key part of research into molecular signaling and information processing in biological cells. However, it can be impr...
John F. Keane, Christopher Bradley, Carl Ebeling
LCN
2005
IEEE
15 years 8 months ago
Implementation and Performance Analysis of a Packet Scheduler on a Programmable Network Processor
— The problem of achieving fairness in the allocation of the bandwidth resource on a link shared by multiple flows of traffic has been extensively researched over the last deca...
Fariza Sabrina, Salil S. Kanhere, Sanjay Jha
IJCNN
2000
IEEE
15 years 7 months ago
Design and Evaluation of Neural Networks for Coin Recognition by Using GA and SA
In this paper, we propose a method to design a neural network(NN) by using a genetic algorithm(GA) and simulated annealing(SA). And also, in order to demonstrate the effectivenes...
Yasue Mitsukura, Minoru Fukumi, Norio Akamatsu
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
15 years 10 months ago
Model-based synthesis and optimization of static multi-rate image processing algorithms
Abstract—High computational effort in modern image processing applications like medical imaging or high-resolution video processing often demands for massively parallel special p...
Joachim Keinert, Hritam Dutta, Frank Hannig, Chris...