734 search results - page 140 / 147 » Hardware support for code integrity in embedded processors |
IEEEPACT
2007
IEEE
14 years 1 months ago
2007
IEEE
Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...
HPCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
IEEEPACT
2008
IEEE
14 years 1 months ago
2008
IEEE
Technology scaling in integrated circuits has consistently provided dramatic performance improvements in modern microprocessors. However, increasing device counts and decreasing o...
ISPASS
2005
IEEE
14 years 1 months ago
2005
IEEE
A wide spectrum of e-commerce (B2B/B2C), banking, financial trading and other business applications require the exchange of data to be highly secure. The Secure Sockets Layer (SSL...
CGO
2008
IEEE
14 years 1 months ago
2008
IEEE
Array inlining expands the concepts of object inlining to arrays. Groups of objects and arrays that reference each other are placed consecutively in memory so that their relative ...