Sciweavers

71 search results - page 12 / 15
» Hardware-Supported Fault Tolerance for Multiprocessors
Sort
View
ISCA
2009
IEEE
137views Hardware» more  ISCA 2009»
14 years 2 months ago
A case for an interleaving constrained shared-memory multi-processor
Shared-memory multi-threaded programming is inherently more difficult than single-threaded programming. The main source of complexity is that, the threads of an application can in...
Jie Yu, Satish Narayanasamy
IPPS
2003
IEEE
14 years 28 days ago
The Case for Fair Multiprocessor Scheduling
Partitioning and global scheduling are two approaches for scheduling real-time tasks on multiprocessors. Though partitioning is sub-optimal, it has traditionally been preferred; t...
Anand Srinivasan, Philip Holman, James H. Anderson...
CODES
2007
IEEE
14 years 2 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
ASPLOS
2009
ACM
14 years 8 months ago
Understanding software approaches for GPGPU reliability
Even though graphics processors (GPUs) are becoming increasingly popular for general purpose computing, current (and likely near future) generations of GPUs do not provide hardwar...
Martin Dimitrov, Mike Mantor, Huiyang Zhou
SPAA
2003
ACM
14 years 27 days ago
The complexity of verifying memory coherence
The general problem of verifying coherence for shared-memory multiprocessor executions is NP-Complete. Verifying memory consistency models is therefore NP-Hard, because memory con...
Jason F. Cantin, Mikko H. Lipasti, James E. Smith