71 search results - page 8 / 15 » Hardware-Supported Fault Tolerance for Multiprocessors |
DSN
2000
IEEE
14 years 2 days ago
2000
IEEE
Recent work has shown the advantages of using persistent memory for transaction processing. In particular, the Vista transaction system uses recoverable memory to avoid disk I/O, ...
IPPS
2000
IEEE
14 years 1 days ago
2000
IEEE
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...
CODES
2011
IEEE
12 years 7 months ago
2011
IEEE
Reliability is a major requirement for most safety-related systems. To meet this requirement, fault-tolerant techniques such as hardware replication and software re-execution are ...
ISCA
2003
IEEE
14 years 28 days ago
2003
IEEE
To address the increasing susceptibility of commodity chip multiprocessors (CMPs) to transient faults, we propose Chiplevel Redundantly Threaded multiprocessor with Recovery (CRTR...
CAMP
2005
IEEE
14 years 1 months ago
2005
IEEE
Abstract— The promise of next-generation computer technologies, such as nano-electronics, implies a number of serious alterations to the design flow of digital circuits. One of ...