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ISCA
1995
IEEE
120views Hardware» more  ISCA 1995»
13 years 11 months ago
Streamlining Data Cache Access with Fast Address Calculation
For many programs, especially integer codes, untolerated load instruction latencies account for a significant portion of total execution time. In this paper, we present the desig...
Todd M. Austin, Dionisios N. Pnevmatikatos, Gurind...
ISCA
1995
IEEE
92views Hardware» more  ISCA 1995»
13 years 11 months ago
A Comparison of Full and Partial Predicated Execution Support for ILP Processors
One can e ectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential bene ts of predicated execution are hig...
Scott A. Mahlke, Richard E. Hank, James E. McCormi...
ISLPED
1995
ACM
131views Hardware» more  ISLPED 1995»
13 years 11 months ago
Guarded evaluation: pushing power management to logic synthesis/design
The need to reduce the power consumption of the next generation of digital systems is clearly recognized. At the system level, power management is a very powerful technique and de...
Vivek Tiwari, Sharad Malik, Pranav Ashar
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
13 years 11 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
WCRE
1995
IEEE
13 years 11 months ago
Pattern Matching for Design Concept Localization
A legacy system is an operational, large-scale software system that is maintained beyond its first generation of programmers. It typically represents a massive economic investmen...
Kostas Kontogiannis, Renato de Mori, Morris Bernst...
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