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ISPASS
2010
IEEE
14 years 4 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
ASPLOS
2010
ACM
14 years 4 months ago
MacroSS: macro-SIMDization of streaming applications
SIMD (Single Instruction, Multiple Data) engines are an essential part of the processors in various computing markets, from servers to the embedded domain. Although SIMD-enabled a...
Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Ku...
MIR
2010
ACM
229views Multimedia» more  MIR 2010»
14 years 4 months ago
Wavelet, active basis, and shape script: a tour in the sparse land
Sparse coding is a key principle that underlies wavelet representation of natural images. In this paper, we explain that the effort of seeking a common wavelet sparse coding of i...
Zhangzhang Si, Ying Nian Wu
ISPASS
2009
IEEE
14 years 4 months ago
Evaluating GPUs for network packet signature matching
Modern network devices employ deep packet inspection to enable sophisticated services such as intrusion detection, traffic shaping, and load balancing. At the heart of such servi...
Randy Smith, Neelam Goyal, Justin Ormont, Karthike...
EDBT
2009
ACM
166views Database» more  EDBT 2009»
14 years 4 months ago
Shore-MT: a scalable storage manager for the multicore era
Database storage managers have long been able to efficiently handle multiple concurrent requests. Until recently, however, a computer contained only a few single-core CPUs, and th...
Ryan Johnson, Ippokratis Pandis, Nikos Hardavellas...
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