238 search results - page 25 / 48 » Hierarchical Interconnect Circuit Models |
DAC
2005
ACM
14 years 8 months ago
2005
ACM
We demonstrate how to use placement to ameliorate the predicted repeater explosion problem caused by poor interconnect scaling. We achieve repeater count reduction by dynamically ...
DAC
2003
ACM
14 years 27 days ago
2003
ACM
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Skin effect makes interconnect resistance and inductance frequency dependent. This paper addresses the problem of efficiently estimating the signal characteristics of any RLC netw...
CAMP
2005
IEEE
14 years 1 months ago
2005
IEEE
Abstract— The promise of next-generation computer technologies, such as nano-electronics, implies a number of serious alterations to the design flow of digital circuits. One of ...
ICCD
2000
IEEE
14 years 1 days ago
2000
IEEE
When proposing new architectural enhancements, it is also important to account for the hardware complexity. To achieve this goal, we propose to model the new design in a hardware ...