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SEUS
2009
IEEE
14 years 2 months ago
Towards Time-Predictable Data Caches for Chip-Multiprocessors
Future embedded systems are expected to use chip-multiprocessors to provide the execution power for increasingly demanding applications. Multiprocessors increase the pressure on th...
Martin Schoeberl, Wolfgang Puffitsch, Benedikt Hub...
DATE
2000
IEEE
105views Hardware» more  DATE 2000»
13 years 12 months ago
System Synthesis for Multiprocessor Embedded Applications
This paper presents the system synthesis techniques available in S3 E2 S, a CAD environment for the specification, simulation, and synthesis of embedded electronic systems that ca...
Luigi Carro, Márcio Eduardo Kreutz, Fl&aacu...
IPPS
2007
IEEE
14 years 1 months ago
Rethinking Automated Synthesis of MPSoC Architectures
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...
Brett H. Meyer, Donald E. Thomas
ISCA
1993
IEEE
137views Hardware» more  ISCA 1993»
13 years 11 months ago
Transactional Memory: Architectural Support for Lock-Free Data Structures
A shared data structure is lock-free if its operations do not require mutual exclusion. If one process is interrupted in the middle of an operation, other processes will not be pr...
Maurice Herlihy, J. Eliot B. Moss
VECPAR
2000
Springer
13 years 11 months ago
Improving the Performance of Heterogeneous DSMs via Multithreading
This paper analyzes the impact of hardware multithreading support on the performance of distributed shared-memory DSM multiprocessors built out of heterogeneous, single-chip compu...
Renato J. O. Figueiredo, Jeffrey P. Bradford, Jos&...