319 search results - page 24 / 64 » Hierarchical Simulation of a Multiprocessor Architecture |
DAC
1997
ACM
13 years 11 months ago
1997
ACM
Novel test bench techniques are required to cope with a functional test complexity which is predicted to grow much more strongly than design complexity. Our test bench approach at...
ISOLA
2010
Springer
13 years 6 months ago
2010
Springer
This article comprehensively surveys the work accomplished during the past decade on an approach to analyze concurrent systems qualitatively and quantitatively, by combining functi...
CODES
2004
IEEE
13 years 11 months ago
2004
IEEE
Single chip heterogeneous multiprocessors are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs trad...
IPPS
2000
IEEE
13 years 12 months ago
2000
IEEE
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...