319 search results - page 3 / 64 » Hierarchical Simulation of a Multiprocessor Architecture |
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
We present the design exploration of a System-on-Chip architecture dedicated to the implementation of the HIPERLAN/2 communication protocol. The task was accomplished by means of ...
ICCS
2004
Springer
14 years 26 days ago
2004
Springer
We consider the realization of matrix-matrix multiplication and propose a hierarchical algorithm implemented in a task-parallel way using multiprocessor tasks on distributed memory...
HPCC
2005
Springer
14 years 1 months ago
2005
Springer
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
CATA
2006
13 years 9 months ago
2006
Neither simulation results nor real system results give an explanation to the behavior of advanced computer systems for the full design spectrum. In this paper, we present simple ...
EUROPAR
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. Modern multiprocessor architectures such as CC-NUMA machines or CMPs have nonuniform communication architectures that render programs sensitive to memory access locality....