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FCCM
2006
IEEE
195views VLSI» more  FCCM 2006»
14 years 5 months ago
A Parallel Hardware Architecture for fast Gaussian Elimination over GF(2)
This paper presents a hardware-optimized variant of the well-known Gaussian elimination over GF(2) and its highly efficient implementation. The proposed hardware architecture, we...
Andrey Bogdanov, M. C. Mertens
ICPADS
2006
IEEE
14 years 5 months ago
SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors
One of the major factors that can potentially slow down widespread use of embedded chip multiprocessors is lack of efficient software support. In particular, automated code paral...
Liping Xue, Mahmut T. Kandemir, Guangyu Chen, Tayl...
IPPS
2006
IEEE
14 years 5 months ago
Analysis of checksum-based execution schemes for pipelined processors
The performance requirements for contemporary microprocessors are increasing as rapidly as their number of applications grows. By accelerating the clock, performance can be gained...
Bernhard Fechner
CASES
2006
ACM
14 years 4 months ago
Reducing energy of virtual cache synonym lookup using bloom filters
Virtual caches are employed as L1 caches of both high performance and embedded processors to meet their short latency requirements. However, they also introduce the synonym proble...
Dong Hyuk Woo, Mrinmoy Ghosh, Emre Özer, Stua...
CASES
2006
ACM
14 years 4 months ago
Code transformation strategies for extensible embedded processors
Embedded application requirements, including high performance, low power consumption and fast time to market, are uncommon in the broader domain of general purpose applications. I...
Paolo Bonzini, Laura Pozzi