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CLUSTER
2002
IEEE
14 years 2 months ago
Supermon: A High-Speed Cluster Monitoring System
Supermon is a flexible set of tools for high speed, scalable cluster monitoring. Node behavior can be monitored much faster than with other commonly used methods (e.g., rstatd). ...
Matthew J. Sottile, Ronald Minnich
IEEEPACT
2008
IEEE
14 years 3 months ago
Leveraging on-chip networks for data cache migration in chip multiprocessors
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
Noel Eisley, Li-Shiuan Peh, Li Shang
ASAP
1996
IEEE
145views Hardware» more  ASAP 1996»
14 years 1 months ago
A Synthesis System For Bus-Based Wavefront Array Architectures
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
Reiner W. Hartenstein, Jürgen Becker, Michael...
ISCA
2005
IEEE
121views Hardware» more  ISCA 2005»
14 years 2 months ago
Direct Cache Access for High Bandwidth Network I/O
Recent I/O technologies such as PCI-Express and 10Gb Ethernet enable unprecedented levels of I/O bandwidths in mainstream platforms. However, in traditional architectures, memory ...
Ram Huggahalli, Ravi R. Iyer, Scott Tetrick
HPCA
1997
IEEE
14 years 1 months ago
Global Address Space, Non-Uniform Bandwidth: A Memory System Performance Characterization of Parallel Systems
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
Thomas Stricker, Thomas R. Gross