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ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
14 years 3 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
CLUSTER
2007
IEEE
14 years 3 months ago
Non-collective parallel I/O for global address space programming models
— Achieving high performance for out-of-core applications typically involves explicit management of the movement of data between the disk and the physical memory. We are developi...
Sriram Krishnamoorthy, Juan Piernas, Vinod Tippara...
DSD
2004
IEEE
136views Hardware» more  DSD 2004»
14 years 27 days ago
Architecture of Wireless Sensor Node using Novel Ultra-Wideband Modulation Scheme
Recently ultra-wideband (UWB) communications has emerged as an alternative to narrowband communications used in wireless sensor networks. One of UWB(s) most attractive feature for...
Matthew D'Souza, Adam Postula
MICRO
2009
IEEE
129views Hardware» more  MICRO 2009»
14 years 3 months ago
Execution leases: a hardware-supported mechanism for enforcing strong non-interference
High assurance systems such as those found in aircraft controls and the financial industry are often required to handle a mix of tasks where some are niceties (such as the contro...
Mohit Tiwari, Xun Li, Hassan M. G. Wassel, Frederi...
ATC
2007
Springer
14 years 3 months ago
An Approach to a Trustworthy System Architecture Using Virtualization
We present a system architecture for trusted transactions in highly sensitive environments. This architecture takes advantage of techniques provided by the Trusted Computing Group ...
Frederic Stumpf, Michael Benz, Martin Hermanowski,...