456 search results - page 79 / 92 » High Level Architecture Remote Data Filtering |
JSA
2010
13 years 3 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
SASP
2008
IEEE
14 years 3 months ago
2008
IEEE
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
ISCAS
2006
IEEE
14 years 3 months ago
2006
IEEE
We describe a sensor network based on smart requirements of the network. This will provide a new approach imager sensors able to extract events of interest from a scene. for compos...
ISCA
1994
IEEE
14 years 1 months ago
1994
IEEE
Today's commodity microprocessors require a low latency memory system to achieve high sustained performance. The conventional high-performance memory system provides fast dat...
ICDIM
2008
IEEE
14 years 3 months ago
2008
IEEE
Client-server architectures with clients on divergent platforms are in need of services that serve a high level of interoperability and a loose binding. It should be prevented tha...