Sciweavers

253 search results - page 3 / 51
» High Level Programming Methodologies for Data Intensive Comp...
Sort
View
IEEEPACT
2000
IEEE
13 years 12 months ago
Exploring the Limits of Sub-Word Level Parallelism
Multimedia instruction set extensions have become a prominent feature in desktop microprocessor platforms, promising superior performance on a wide range of floating-point and int...
Kevin Scott, Jack W. Davidson
SASP
2008
IEEE
162views Hardware» more  SASP 2008»
14 years 1 months ago
Accelerating Compute-Intensive Applications with GPUs and FPGAs
—Accelerators are special purpose processors designed to speed up compute-intensive sections of applications. Two extreme endpoints in the spectrum of possible accelerators are F...
Shuai Che, Jie Li, Jeremy W. Sheaffer, Kevin Skadr...
IIE
2008
123views more  IIE 2008»
13 years 7 months ago
A Methodological Review of the Program Evaluations in K-12 Computer Science Education
Because of the potential for methodological reviews to improve practice, this article presents the results of a methodological review, and meta-analysis, of kindergarten through 12...
Justus J. Randolph
HPCA
2008
IEEE
14 years 7 months ago
Branch-mispredict level parallelism (BLP) for control independence
A microprocessor's performance is fundamentally limited by the rate at which it can resolve branch mispredictions. Control independence (CI) architectures look for useful con...
Kshitiz Malik, Mayank Agarwal, Sam S. Stone, Kevin...
WWW
2004
ACM
14 years 8 months ago
OntoWeaver-S: Integrating Web Services into Data-Intensive Web Sites
Designing web sites is a complex task. Ad-hoc rapid prototyping easily leads to unsatisfactory results, e.g. poor maintainability and extensibility. However, existing web design f...
Yuangui Lei, Enrico Motta, John Domingue