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» High Performance FPGA Implementation of the Mersenne Twister
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CHES
2004
Springer
106views Cryptology» more  CHES 2004»
14 years 11 days ago
XTR Implementation on Reconfigurable Hardware
Abstract. Recently, Lenstra and Verheul proposed an efficient cryptosystem called XTR. This system represents elements of F p6 with order dividing p2 -p+1 by their trace over Fp2 ....
Eric Peeters, Michael Neve, Mathieu Ciet
FPL
2006
Springer
108views Hardware» more  FPL 2006»
14 years 8 days ago
Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
James Moscola, Young H. Cho, John W. Lockwood
FCCM
2009
IEEE
170views VLSI» more  FCCM 2009»
13 years 6 months ago
Generic Software Framework for Adaptive Applications on FPGAs
Adaptive systems are set to become more mainstream, as numerous practical applications in the communications domain emerge. FPGAs offer an ideal implementation platform, combining...
Suhaib A. Fahmy, Jorg Lotze, Juanjo Noguera, Linda...
FPL
2005
Springer
119views Hardware» more  FPL 2005»
14 years 2 months ago
Real-Time Feature Extraction for High Speed Networks
With the onset of Gigabit networks, current generation networking components will soon be insufficient for numerous reasons: most notably because existing methods cannot support h...
David Nguyen, Gokhan Memik, Seda Ogrenci Memik, Al...
FPL
2004
Springer
101views Hardware» more  FPL 2004»
14 years 2 months ago
The Chess Monster Hydra
Abstract. With the help of the FPGA technology, the boarder between hardand software has vanished. It is now possible to develop complex designs and fine grained parallel applicat...
Chrilly Donninger, Ulf Lorenz