174 search results - page 19 / 35 » High Performance FPGA Implementation of the Mersenne Twister |
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
Searching for multiple string patterns in a stream of data is a computationally expensive task. The speed of the search pattern module determines the overall performance of deep p...
FPL
2001
Springer
13 years 12 months ago
2001
Springer
Although FPGA technology offers the potential of designing high performance systems at low cost, its programming model is prohibitively low level. To allow a novice signal/image pr...
CISIS
2011
IEEE
12 years 7 months ago
2011
IEEE
—Computational performance increasingly depends on parallelism, and many systems rely on heterogeneous resources such as GPUs and FPGAs to accelerate computationally intensive ap...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
Fixed-complexity sphere decoder (FSD) is a recently proposed technique for multiple-input multiple-output (MIMO) detection. It has several outstanding features such as constant thr...
ISVLSI
2003
IEEE
14 years 23 days ago
2003
IEEE
This paper presents the design and implementation of the new Active Memory Manager Unit (AMMU) designed to be embedded into System-on-Chip CPUs. The unit is implemented using VHDL...