174 search results - page 33 / 35 » High Performance FPGA Implementation of the Mersenne Twister |
ISNN
2005
Springer
14 years 29 days ago
2005
Springer
Abstract. Artificial Neural Networks (ANNs) and image processing requires massively parallel computation of simple operator accompanied by heavy memory access. Thus, this type of ...
ASPDAC
2000
ACM
13 years 11 months ago
2000
ACM
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
ASAP
2004
IEEE
13 years 11 months ago
2004
IEEE
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
CHES
2010
Springer
13 years 8 months ago
2010
Springer
This paper introduces a new class of optical fault injection attacks called bumping attacks. These attacks are aimed at data extraction from secure embedded memory, which usually s...
WCNC
2010
IEEE
13 years 5 months ago
2010
IEEE
—Time based localisation methods like GPS are widely used for outdoor navigation, whereas indoor navigation is typically performed only on a cell-basis or based on the Received S...