174 search results - page 7 / 35 » High Performance FPGA Implementation of the Mersenne Twister |
ARC
2006
Springer
13 years 11 months ago
2006
Springer
This paper presents a reconfigurable hardware architecture for Public-key cryptosystems. By changing the connections of coarse grain Carry-Save Adders (CSAs), the datapath provides...
ISVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, we propose and implement a vector processing system that includes two identical vector microprocessors embedded in two FPGA chips. Each vector microprocessor suppor...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
SERSCISA
2010
Springer
13 years 9 months ago
2010
Springer
The delay and dispersion of the packet train have been widely used in most network measurement tools. The timestamp of the packet is critical for the measurement accuracy. However...
ARC
2009
Springer
14 years 2 months ago
2009
Springer
As the need for information security increases in our everyday life, the job of encoding/decoding for secure information delivery becomes a critical issue in data network systems. ...