624 search results - page 14 / 125 » High Performance Matrix Multiplication on Many Cores |
ERSA
2004
13 years 9 months ago
2004
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
CONEXT
2008
ACM
13 years 9 months ago
2008
ACM
Modern commodity hardware architectures, with their multiple multi-core CPUs and high-speed system interconnects, exhibit tremendous power. In this paper, we study performance lim...
TPDS
2010
13 years 6 months ago
2010
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
AMAST
2008
Springer
13 years 9 months ago
2008
Springer
We demonstrate Spiral, a domain-specific library generation system. Spiral generates high performance source code for linear transforms (such as the discrete Fourier transform and ...
ICCS
2001
Springer
14 years 5 days ago
2001
Springer
Abstract. Sparse matrix-vector multiplication is an important computational kernel that tends to perform poorly on modern processors, largely because of its high ratio of memory op...