624 search results - page 32 / 125 » High Performance Matrix Multiplication on Many Cores |
TODAES
2008
13 years 9 months ago
2008
The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integ...
CORR
2011
Springer
13 years 17 days ago
2011
Springer
Abstract—Set intersection is the core in a variety of problems, e.g. frequent itemset mining and sparse boolean matrix multiplication. It is well-known that large speed gains can...
SP
2008
IEEE
13 years 9 months ago
2008
IEEE
The integration of scalable performance analysis in parallel development tools is difficult. The potential size of data sets and the need to compare results from multiple experime...
CHI
2010
ACM
14 years 3 months ago
2010
ACM
Interest has been growing within HCI on the use of machine learning and reasoning in applications to classify such hidden states as user intentions, based on observations. HCI res...
CSE
2009
IEEE
14 years 12 days ago
2009
IEEE
Sparse Matrix-Vector multiplication (SpMV) is a very challenging computational kernel, since its performance depends greatly on both the input matrix and the underlying architectur...