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» High Performance Matrix Multiplication on Many Cores
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PPL
2002
83views more  PPL 2002»
15 years 3 months ago
Trading Replication for Communication in Parallel Distributed-Memory Dense Solvers
We present new communication-efficient parallel dense linear solvers: a solver for triangular linear systems with multiple right-hand sides and an LU factorization algorithm. Thes...
Dror Irony, Sivan Toledo
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
15 years 10 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
DFT
2008
IEEE
120views VLSI» more  DFT 2008»
15 years 10 months ago
Built-in-Self-Diagnostics for a NoC-Based Reconfigurable IC for Dependable Beamforming Applications
Integrated circuits (IC) targeting at the streaming applications for tomorrow are becoming a fast growing market. Applications such as beamforming require mass computing capabilit...
Oscar Kuiken, Xiao Zhang, Hans G. Kerkhoff
162
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ICML
2010
IEEE
15 years 5 months ago
Learning Sparse SVM for Feature Selection on Very High Dimensional Datasets
A sparse representation of Support Vector Machines (SVMs) with respect to input features is desirable for many applications. In this paper, by introducing a 0-1 control variable t...
Mingkui Tan, Li Wang, Ivor W. Tsang
ASPLOS
2009
ACM
16 years 4 months ago
Mixed-mode multicore reliability
Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...