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» High Performance Matrix Multiplication on Many Cores
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CC
2011
Springer
270views System Software» more  CC 2011»
13 years 19 days ago
Subregion Analysis and Bounds Check Elimination for High Level Arrays
For decades, the design and implementation of arrays in programming languages has reflected a natural tension between productivity and performance. Recently introduced HPCS langua...
Mackale Joyner, Zoran Budimlic, Vivek Sarkar
ECCV
2008
Springer
14 years 11 months ago
Using Multiple Hypotheses to Improve Depth-Maps for Multi-View Stereo
We propose an algorithm to improve the quality of depth-maps used for Multi-View Stereo (MVS). Many existing MVS techniques make use of a two stage approach which estimates depth-m...
Carlos Hernández, George Vogiatzis, Neill D...
ICASSP
2008
IEEE
14 years 3 months ago
Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
Chun Jason Xue, Tiantian Liu, Zili Shao, Jingtong ...
CORR
2011
Springer
197views Education» more  CORR 2011»
13 years 4 months ago
High-Throughput Transaction Executions on Graphics Processors
OLTP (On-Line Transaction Processing) is an important business system sector in various traditional and emerging online services. Due to the increasing number of users, OLTP syste...
Bingsheng He, Jeffrey Xu Yu
VLSID
2007
IEEE
99views VLSI» more  VLSID 2007»
14 years 9 months ago
Low Power Implementation for Minimum Norm Sorting and Block Upper Tri-angularization of Matrices used in MIMO Wireless Systems
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahme...